RK3288 android7.1 edp传输速率修改
kernel\drivers\gpu\drm\bridge\analogix\analogix_dp_core.c static void analogix_dp_init_training(struct analogix_dp_device *dp, enum link_lane_count_type max_lane, int max_rate) { /* * MACRO_RST must be applied after the PLL_LOCK to avoid * the DP inter pair skew issue for at least 10 us */ analogix_dp_reset_macro(dp); /* Initialize by reading RX's DPCD */ analogix_dp_get_max_rx_bandwidth(dp, &dp->link_train.link_rate); analogix_dp_get_max_rx_lane_count(dp, &dp->link_train.lane_count); if ((dp->link_train.link_rate != DP_LINK_BW_1_62) && (dp->link_train.link_rate != DP_LINK_BW_2_7) && (dp->link_train.link_rate != DP_LINK_BW_5_4)) { dev_err(dp->dev, "Rx Max Link Rate is abnormal :%x !\n", dp->link_train.link_rate); dp->link_train.link_rate = DP_LINK_BW_1_62; } + dp->link_train.link_rate = DP_LINK_BW_1_62; if (dp->link_train.lane_count == 0) { dev_err(dp->dev, "Rx Max Lane count is abnormal :%x !\n",