S32K系列S32K144学习笔记——ADC
S32K系列S32K144学习笔记——ADC
本例程基以下如图所示接口操作，MCU为S32K144，开发平台S32DSworkspace
功能描述：读取端口电压
如有错误，麻烦帮忙指出，谢谢！
#include "S32K144.h" /* include peripheral declarations S32K144 */
#include "s32_core_cm4.h"
#define ADC_ON() (PTE->PDOR |= (1<<7))
#define ADC_OFF() (PTE->PDOR &= ~(1<<7))
void WDOG_disable (void)
{
WDOG->CNT=0xD928C520; //解锁看门狗
WDOG->TOVAL=0x0000FFFF; //把时间配置为最大
WDOG->CS = 0x00002100; //关闭看门狗
}
void SOSC_init_8MHz(void)
{
SCG->SOSCDIV=0x00000101; // SOSCDIV1 & SOSCDIV2 =1: divide by 1
SCG->SOSCCFG=0x00000024; /* Range=2: Medium freq (SOSC betw 1MHz-8MHz)*/
/* HGO=0: Config xtal osc for low power */
/* EREFS=1: Input is external XTAL */
while(SCG->SOSCCSR & SCG_SOSCCSR_LK_MASK); /* Ensure SOSCCSR unlocked */
SCG->SOSCCSR=0x00000001; /* LK=0: SOSCCSR can be written */
/* SOSCCMRE=0: OSC CLK monitor IRQ if enabled */
/* SOSCCM=0: OSC CLK monitor disabled */
/* SOSCERCLKEN=0: Sys OSC 3V ERCLK output clk disabled */
/* SOSCLPEN=0: Sys OSC disabled in VLP modes */
/* SOSCSTEN=0: Sys OSC disabled in Stop modes */
/* SOSCEN=1: Enable oscillator */
while(!(SCG->SOSCCSR & SCG_SOSCCSR_SOSCVLD_MASK)); /* Wait for sys OSC clk valid */
}
void SPLL_init_160MHz(void)
{
while(SCG->SPLLCSR & SCG_SPLLCSR_LK_MASK); /* Ensure SPLLCSR unlocked */
SCG->SPLLCSR = 0x00000000; /* SPLLEN=0: SPLL is disabled (default) */
SCG->SPLLDIV = 0x00000302; /* SPLLDIV1 divide by 2; SPLLDIV2 divide by 4 */
SCG->SPLLCFG = 0x00180000; /* PREDIV=0: Divide SOSC_CLK by 0+1=1 */
/* MULT=24: Multiply sys pll by 4+24=40 */
/* SPLL_CLK = 8MHz / 1 * 40 / 2 = 160 MHz */
while(SCG->SPLLCSR & SCG_SPLLCSR_LK_MASK); /* Ensure SPLLCSR unlocked */
SCG->SPLLCSR = 0x00000001; /* LK=0: SPLLCSR can be written */
/* SPLLCMRE=0: SPLL CLK monitor IRQ if enabled */
/* SPLLCM=0: SPLL CLK monitor disabled */
/* SPLLSTEN=0: SPLL disabled in Stop modes */
/* SPLLEN=1: Enable SPLL */
while(!(SCG->SPLLCSR & SCG_SPLLCSR_SPLLVLD_MASK)); /* Wait for SPLL valid */
}
void NormalRUNmode_40MHz (void)
{
/* Change to normal RUN mode with 8MHz SOSC, 80 MHz PLL*/
SCG->RCCR=SCG_RCCR_SCS(6) /* PLL as clock source*/
|SCG_RCCR_DIVCORE(0b11) /* DIVCORE=3, div. by 4: Core clock = 160/4 MHz = 40 MHz*/
|SCG_RCCR_DIVBUS(0b11) /* DIVBUS=3, div. by 4: bus clock = 160/4 MHz = 40 MHz*/
|SCG_RCCR_DIVSLOW(0b111); /* DIVSLOW=7, div. by 8: SCG slow, flash clock= 160/8 MHz = 20MHZ*/
while (((SCG->CSR & SCG_CSR_SCS_MASK) >> SCG_CSR_SCS_SHIFT ) != 6) {}
/* Wait for sys clk src = SPLL */
}
void ADC_init (void)
{
//ADC硬件上开关接口配置
PCC->PCCn[PCC_PORTE_INDEX] |= PCC_PCCn_CGC_MASK; // Enable clock for PORTE
PTE->PDDR |= (1<<7); //Port E7: Data Direction= output
PORTE->PCR[7] = 0x00000100; // Port E7: MUX = GPIO
PTE->PDOR &= ~(1<<7); //OUTPUT Low
PCC->PCCn[PCC_PORTA_INDEX] |= PCC_PCCn_CGC_MASK; /* Enable clock for PORTA */
PORTA->PCR[6] = PORT_PCR_MUX(0); /* Port A6: MUX = ALT0,ADC */
PCC->PCCn[PCC_ADC0_INDEX] &=~ PCC_PCCn_CGC_MASK; /* Disable clock to change PCS */
PCC->PCCn[PCC_ADC0_INDEX] |= PCC_PCCn_PCS(1); /* PCS=1: Select SOSCDIV2 = 8MHZ */
PCC->PCCn[PCC_ADC0_INDEX] |= PCC_PCCn_CGC_MASK; /* Enable bus clock in ADC */
ADC0->SC1[0] =0x00001F; /* ADCH=1F: Module is disabled for conversions*/
/* AIEN=0: Interrupts are disabled */
ADC0->CFG1 = 0x000000004; /* ADICLK=0: Input clk=ALTCLK1=SOSCDIV2 */
/* ADIV=0: Prescaler=1 */
/* MODE=1: 12-bit conversion */
ADC0->CFG2 = 0x00000000C; /* SMPLTS=12(default): sample time is 13 ADC clks */
ADC0->SC2 = 0x00000000; /* ADTRG=0: SW trigger */
/* ACFE,ACFGT,ACREN=0: Compare func disabled */
/* DMAEN=0: DMA disabled */
/* REFSEL=0: Voltage reference pins= VREFH, VREEFL */
ADC0->SC3 = 0x00000000; /* CAL=0: Do not start calibration sequence */
/* ADCO=0: One conversion performed */
/* AVGE,AVGS=0: HW average function disabled */
}
void Convert_ADC_Chan (unsigned int Adc_Chan)
{
/* For SW trigger mode, SC1[0] is used */
ADC0->SC1[0] &= ~ADC_SC1_ADCH_MASK; /* Clear prior ADCH bits */
ADC0->SC1[0] = ADC_SC1_ADCH(Adc_Chan); /* Initiate Conversion */
}
unsigned char ADC_Complete(void)
{
return ((ADC0->SC1[0] & ADC_SC1_COCO_MASK)>>ADC_SC1_COCO_SHIFT); /* Wait for completion */
}
unsigned int Read_ADC_Chx (void)
{
unsigned int Adc_Result = 0;
Adc_Result = ADC0->R[0]; /* For SW trigger mode, R[0] is used */
return Adc_Result;
//return (unsigned int) ((5000*Adc_Result)/0xFFF); /* Convert result to mv for 0-5V range */
}
#define ARRAY_SIZE 5 //数组大小
unsigned int READ_ADC(void)
{
unsigned char count;
unsigned int BUF[ARRAY_SIZE] = {0};
unsigned int Voltage_Value = 0;
for(count = 0;count<ARRAY_SIZE;count++)
{
Convert_ADC_Chan(ADC_Channel);//开始转换ADC0 2通道
while(ADC_Complete()==0){}//等待转换完成
BUF[count] = Read_ADC_Chx();//判断读取值是否小于限制值
}
Voltage_Value = DATA_SORT(BUF);
return Voltage_Value;
}
/*读取5个值，去掉最大最小*/
unsigned int DATA_SORT(unsigned int buf[])
{
unsigned int SUM = 0;
unsigned char i,j;
unsigned int A;
for(j = 0;j<(ARRAY_SIZE-1);j++)
{
for(i = 0;i<(ARRAY_SIZE-1-j);i++)
{
if(buf[i]>buf[i+1])
{
A = buf[i+1];
buf[i+1] = buf[i];
buf[i] = A;
}
}
}
for(i=1;i<(ARRAY_SIZE-1);i++)
{
SUM += buf[i];
}
SUM = SUM/3;
return SUM;
}
int main(void)
{
unsigned int ADC_Value;
WDOG_disable(); //关闭看门狗
SOSC_init_8MHz(); //配置系统振荡器为外部8MHZ
SPLL_init_160MHz(); //使用SOSC 8MHZ配置SPLL 为160 MHz
NormalRUNmode_40MHz(); //配置系列时钟40MHz, 40MHz总线时钟
ADC_init(); //ADC0配置
ADC_ON(); //把硬件开关打开，在低功耗时需要关掉
delay_ms(1000); //ADC电源开关打开需要稳定一下再去读取
for(;;)
{
ADC_Value = READ_ADC(); //读取ADC的值
//读取ADC_Value就是ADC值
}
return 0;
}